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preliminary rev.01 1/16 EP1551 1 mhz five-channel power supply features up to 95% efficiency ? step-up and up to 92% efficient step-down converters combine ? step-up and step-down for up to 87% efficiency buck-boost operations minimum 0.7v input voltage ? 2a shutdown mode ? intern ? al soft start control overload protection ? compact ? qfn-32 5 x 5 mm package applications ? digital still camera ? digital video camera ? pda ? mp3 ? pmp ? portable dvd player ? car navigation description the EP1551 is a small, high efficiency, five-channel, power-supply for digital still and video cameras. it consists of: ? step-up dc-dc converter with on-chip power mosfet s for 3.3v main system supply with up to 95% efficiency. it accepts inputs from 0.7v to 5.5v and regu lates a resistor-adjustable output from 2.7v to 5.5v. ? step-down main dc-dc converter with on-chip power mosfets for 1.5v dsp core supply with up to 92% efficiency. it can operate from the st ep-up main system supply providing buck-boost capability with up to 90% compound efficiency, or it can run directly from battery if buck-boost operation is not needed. ? pwm controller with external fet for step- up dc-dc converter for 5v motor actuator ? pwm controller with external fet for 15v lcd supply ? pwm controller with external fet and transformer for ?7.5v and +15v ccd bias all dc-dc channels operate at one fixed frequency settable from 100khz to 1mhz to optimize size, cost and efficiency. other features include soft-start, power-ok outputs, and overload protecti on. the EP1551 is available in apace saving qfn-32 5 x 5 mm packages. an evaluation kit is also available to expedite design.
preliminary rev.01 2/16 EP1551 figure 1. basic application circuit with EP1551 example package/ order information eorex power management multi-channel power-supply series number e p 15 51 ep 1551
preliminary rev.01 3/16 EP1551 absolute maximum rating (note 1) outbu_, insd, sdok, on_, fb_, fbsel_ to gnd................................ -0.3v to +6v pgnd to gnd ................................................ .................................. ...... -0.3v to +0.3v dl_to pgnd................................................... ............................-0.3v to outsu+0.3v lxsu current (note 2) ................................................................................................3.6a lxsd current (note 2) ..............................................................................................2.25a ref, osc, comp_ to gnd.......................... ..............................-0.3v to outsu+0.3v continuous power dissipation (ta=70c, derate 22m w/c above +70c)......1700mw operating temperat ure range.............................................................. -40c to +85c junction temperature ............ ................ ............... ............... ............... ...............+150c storage temperature range........ ............... ............... ............... .......... -65c to +150c lead temperature (s oldering, 10s) ............. ............... ........... ............. ...............+150c note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: lxsu has internal clamp diodes to outsu and pgnd, and lxsd has internal clamp diodes to insd and pgnd. applications that forward bias these diodes should take care not to exceed the devices power dissipation limits. electrical characteristics (voutsu = 3.3v, ta = 0c to +85c, unless otherwise noted.) parameter conditions min typ max unit general: input voltage range 0.7 5.5 v minimum startup voltage iload < 1m a, ta = +25c 1.2 1.4 v thermal shutdown 160 c thermal-shutdown hysteresis 20 c shutdown supply current into outsu onsu = onsd = on1 = on2 = on3 = 0, outsu = 3.6v 0.3 5 a step-up dc-dc supply current into outsu onsu = 3.35v, fbsu = 1.5v (does not include switching losses) 320 400 a step-up plus 1 aux supply current into outsu onsu = on_ = 3.35v, fbsu = 1.5v, fb_= 1.5v (does not include switching losses) 385 600 a step-up plus step-down supply current into outsu onsu = onsd = 3.35v, fbsu = 1.5v, fbsd = 1.5v (does not include switching losses) 1030 1300 a reference output voltage ir ef = 20 a 1.225 1.25 1.275 v reference load regulation 10a < iref < 200a 4.5 10 mv reference line regulation 2.7 < outsu < 5.5v 1.3 5 mv osc discharge trip level rising edge 1.225 1.25 1.275 v osc discharge resistance osc = 1.5v, iosc = 3ma 52 80 ? osc discharge pulse width 230 ns osc frequency rosc = 40k., cosc = 100pf 400 khz
preliminary rev.01 4/16 EP1551 parameter conditions min typ max unit step-up dc-dc converter : step-up startup-to-normal operating threshold rising or falling edge 2.3 2.5 2.6 v step-up startup-to-normal operating threshold hysteresis 80 mv step-up voltage adjust range 2.7 5.5 v fbsu regulation voltage 1.225 1.25 1.275 v outsu regulation voltage f bselsu = gnd 3.250 3.350 3.450 v fbsu to compsu transconductance fbsu = compsu 80 135 185 s fbsu input leakage current fbsu =1.25v -100 1 100 na idle-mode trip level 150 200 265 ma current-sense amplifier transresistance 0.3 v/a step-up maximum duty cycle fbsu = 1v 80 85 90 % outsu leakage current v lxsu = 0v, outsu = 5.5v 0.01 20 a lxsu leakage current v lxsu = outsu = 5.5v 0.01 20 a n-channel 95 105 switch on-resistance p-channel 150 250 m ? n-channel current limit 2 a p-channel turn-off current 20 ma startup current limit outsu = 1.8v 1.2 670 ma startup toff outsu = 1.8v 515 ns startup frequency outsu = 1.8v 0.3 244 khz step-down dc-dc converter : fbsd regulation voltage 1.225 1.25 1.275 v outsd regulation voltage fbselsd=gnd 1.470 1.500 1.530 v fbsd to compsd transconductance fbsd=compsd 80 135 185 us fbsd input leakage current fbsd=1.25v -100 1 100 na idle-mode trip level 110 160 190 ma current-sense amplifier transresistance 0.6 v/a v lxsd = 5.5v outsu = 5.5v 0.01 20 lxsd leakage current v lxsd = 0v outsu = 5.5v 0.01 20 a n-channel 90 150 switch on-resistance p-channel 150 250 ? p-channel current limit 0.79 a n-channel turn-off current 20 ma soft-start interval 4096 osc cycle sdok output low voltage fbsd=0.4v, 0.1ma into sdok pin 0.002 0.1 v sdok operating voltage 1 5.5 v
preliminary rev.01 5/16 EP1551 parameter conditions min typ max unit auxiliary dc-dc controllers (aux 1, 2, and 3) : maximum duty cycle fb_ = 1v 80 85 90 % fb_ regulation voltage 1.225 1.25 1.275 v fb_ to comp_ transconductance fb_ = comp_ 80 135 185 s fb_ input leakage current f bsu =1.25v -100 2 100 na aux1 output regulation voltage fbsel1 = gnd, fb1connected directly aux1 output 4.85 5 5.15 v output high 3 10 dl_ driver resistance output low 2 5 ? dl_ driver current sourcing or sinking 0.5 a soft-start interval 4096 osc cycle logic inputs (on_, fbsel): 1.1v < outsu < 1.8v (onsu only) 0.2 input low level 1.8v < outsu < 5.5v 0.4 v 1.1v < outsu < 1.8v (onsu only) vout su -0.2 input high level 1.8v < outsu < 5.5v 1.6 v fbsel = 3.6v, outsu = 3.6v -100 0 100 fbsel_ input leakage current fbsel = gnd, outsu = 3.6v -100 0 100 na onsu impedance to gnd onsu=3.35v 303 k ? onsd impedance to gnd onsd=3.35v 275 k ? on_ impedance to gnd on_ =3.35v 308 k ?
preliminary rev.01 6/16 EP1551 typical operating characteristics (circuit of figure 2, ta = 25c, unless otherwise noted.) figure 2, typical application circuit (EP1551 evaluation board schematic) step-upefficiency vs . load curren t (3.3v output) 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100% 1 10 100 1000 efficiency @vi n =3 . 6 v efficiency @vi n =3 . 3 v efficiency @vi n =2 . 5 v figure 3. EP1551 step-up efficiency vs load current
preliminary rev.01 7/16 EP1551 s tep- down efficency vs . load current ( 1. 5v out put vout s u=3. 3v) 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100% 1 10 100 1000 efficiency @vi n =3 v efficiency @vi n =3 . 6 v efficiency @vi n =4 . 2 v figure 4. EP1551 step-down efficiency vs. load current buck-boo st efficiency vs . load curren t (1.5v output, vouts u=3.3v) 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 1 10 100 1000 efficiency @vi n =1 . 5 v efficiency @vi n =2 v efficiency @vi n =3 v figure 5. EP1551 buck-boost efficiency vs. load current
preliminary rev.01 8/16 EP1551 figure 6. EP1551 auxiliary pwm step-up efficiency vs. load current
preliminary rev.01 9/16 EP1551 functional block diagram figure 7. block diagram for EP1551 pin description pin name function 1 comp1 auxiliary controller 1 compensation node. conn ect a series rc from comp1 to gnd to compensate the control loop. comp1 is active ly driven to gnd in shutdown and thermal limit. 2 fb1 auxiliary controller 1 feedback input. for 5v output, short fbsel1 to gnd and connect fb1 to the output voltage. for other output voltages, connect fbsel1 to outsu and connect a resistive voltage-divi der from the step-up converter output to fb1 to gnd. the fb1 feedback threshold is then 1.25v. this pin is high impedance in shutdown. 3 pgnda power ground. connect pgnda and pgndb together and to gnd with short trace as close to the ic as possible. 4 lxsd step-down converter power-switching node. connect lxsd to the step-down converter inductor. lxsd is the drain of the p-channel switch and n-channel synchronous rectifier. lxsd is high impedance in shutdown. 5 insd step-down converter input. insd can connect to outsu, effectively making outsd a buck-boost output from the battery. bypass to gnd with a 1f ceramic capacitor if
preliminary rev.01 10/16 EP1551 connected to outsu. insd may also be connected to the battery, but should not exceed outsu by more than a schottky diode forward voltage. bypass insd with a 10f ceramic capacitor when connecting to the battery input. a 10k ? internal resistance connects outsu and insd. 6 onsd step-down converter on/off control input. dr ive onsd high to turn on the step-down converter. this pin has an internal 330k. pul l down resistor. onsd does not start until outsu is in regulation. 7 compsd step-down converter compensation node. connect a series rc from compsd to gnd to compensate the control loop. compsd is pulled to gnd in normal shutdown and during thermal shutdown. 8 fbsd step-down converter feedback input. for a 1.5v output, short fbselsd to gnd and connect fbsd to outsd. for other voltages, short fbselsd to outsu and connect a resistive voltage-divider from outsd to fbsd to gnd. the fbsd feedback threshold is 1.25v. this pin is high impedance in shutdown. 9 on1 auxiliary controller 1 on/off control input. dr ive on1 high to turn on. this pin has an internal 330k. pull down resistor. on1 canno t start until outsu is in regulation. 10 on2 auxiliary controller 2 on/off control input. dr ive on2 high to turn on. this pin has an internal 330k. pull down resistor. on2 canno t start until outsu is in regulation. 11 on3 auxiliary controller 3 on/off control input. drive on3 high to turn on. this pin has an internal 330k ? pull down resistor. on3 cannot st art until outsu is in regulation. 12 onsu step-up converter on/off control. drive onsu high to turn on the step-up converter. all other control pins are lo cked out until 2ms after the step-up output has reached its final value. this pin has an internal 330k. resistance to gnd. 13 ref reference output. bypass ref to gnd with a 0.1f or greater capacitor. the maximum allowed load on ref is 200a. ref is actively pulled to gnd when all converters are shut down. 14 fbsu step-up converter feedback input. to regulate outsu to 3.35v, connect fbselsu to gnd. fbsu may be connected to outsu or gnd. for other output voltages, connect fbselsu to outsu and connect a resistive voltage-divider from outsu to fbsu to gnd. the fbsu feedback threshold is 1.25v. this pin is high impedance in shutdown. 15 compsu step-up converter compensation node. connect a series rc from compsu to gnd to compensate the control loop. compsd is pu lled to gnd in normal shutdown and during thermal shutdown. 16 fbselsu step-up feedback select pin. with fbselsu = gnd, outsu regulates to 3.35v. with fbselsu = outsu, fbsu regulates to a 1.25v threshold for use with external feedback resistors. this pin is high impedance in shutdown. 17 fbselsd step-down feedback select pin. with fbselsd = gnd, fbsd regulates to 1.5v. with fbselsd = outsu, fbsd regulates to 1.25v for use with external feedback resistors. this pin is high impedance in shutdown. 18 fbsel1 auxiliary controller 1 feedback select pin. with fbsel1 = gnd and fb1 regulates to 5v. with fbsel1 = outsu, fb1 regulates to 1.25v for use with external feedback resistors. this pin is high impedance in shutdown. 19 osc oscillator control. connect a timing capacit or from osc to gnd and a timing resistor from osc to outsu to set the oscillator frequency between 100khz and 1mhz. this
preliminary rev.01 11/16 EP1551 pin is high impedance in shutdown. 20 pgndb power ground. connect pgnda and pgndb together and to gnd with short trace as close to the ic as possible. 21 lxsu step-up converter power-switching node. connect lxsu to the step-up converter inductor. lxsu is high impedance in shutdown. 22 outsua step-up converter output. outsua is the power output of the step-up converter. connect outsua to outsub at the ic. 23 sdok this open-drain output goes high impedanc e when the step-down has successfully completed soft-start. 24 comp3 auxiliary controller 3 compensation node. connect a series resistor-capacitor from comp3 to gnd to compensate the control l oop. comp3 is actively driven to gnd in shutdown and thermal limit. 25 fb3 auxiliary controller 3 feedback input. connec t a resistive voltage-divider from the output voltage to fb3 to gnd. the fb3 feedb ack threshold is 1.25v. this pin is high impedance in shutdown. 26 outsub step-up converter output. outsub powers the EP1551 and is the sense input when fbselsu is gnd and the output is 3.3v. connect outsua to outsub. 27 dl3 auxiliary controller 3 gate-drive output. connect the gate of an n-channel mosfet to dl3. dl3 swings from gnd to outsu and supp lies up to 500ma. dl3 is driven to gnd in shutdown and thermal limit. 28 dl2 auxiliary controller 2 gate-drive output. connect the gate of an n-channel mosfet to dl2. dl2 swings from gnd to outsu and supplies up to 500ma. dl2 is driven to gnd in shutdown and thermal limit. 29 dl1 auxiliary controller 1 gate-drive output. connect the gate of an n-channel mosfet to dl1. dl1 swings from gnd to outsu and supplies up to 500ma. dl1 is driven to gnd in shutdown and thermal limit. 30 gnd quiet ground. connect gnd to pgnd as close to the ic as possible. 31 comp2 auxiliary controller 2 compensation node. connect a series resistor-capacitor from comp2 to gnd to compensate the control l oop. comp2 is actively driven to gnd in shutdown and thermal limit. 32 fb2 auxiliary controller 2 feedback input. connec t a resistive voltage-divider from the output voltage to fb2 to gnd to set the output voltage. the fb2 feedback threshold is 1.25v. this pin is high impedance in shutdown. exposed pad ep exposed underside metal pad. this pad must be soldered to the pc board to achieve package thermal and mechanical ratings. the exposed pad is electrically connected to gnd.
preliminary rev.01 12/16 EP1551 operation ? EP1551 includes five channels, a current-mode step-up dc-dc converter, a current-mode step-down dc-dc converter, and three auxiliary voltage-mode dc-dc c ontrollers. all these channels employ fixed frequency pwm operator. ? step-up is typically used to supply 3.3v for main system power. reference voltage and clocks are also generated in this channel. ? sussd (step-up timer done) keeps low for 1,024 clock cycles after onsu goes high, which means in typical application case (clock frequency equals 40 0khz), the other four channels will be enabled after 2.56ms. ? step-down dc-dc converter can be powered from t he battery, or from the output of step-up dc-dc converter. ? three auxiliary controllers are almost same, but only aux1 has optional internal divider for feedback. ? if any channel remains faulted (no reset signal generated by the comparator) for 100,000 clock cycles, then _fltall goes low, all outputs latch off until the step-up dc-dc converter is reinitialized by onsu, or by cycling of input power. the fault-detection for any ch annel is disabled during its initial turn-on soft-start sequence. step-up dc-dc converter figure 8. block diagram for current-mode step-up dc-dc converter
preliminary rev.01 13/16 EP1551 ? during startup, p-channel switch tr ansistor is always off, n-channel sw itch transistor is controlled by startup oscillator?s output. n-channel switch transistor has fixed off time, its on time is determined by startup current limit, inductor value, and input voltage. ? when outsu reaches 2.5v, startup is complete, and the main circuits begin to work. ? the oscillator?s frequency is determined by t he rc network at osc pin and the output volt age of step-up dcdc converter, so the frequency changes as outsu ramps upward following startup. ? current sense amplifier (isense am p) senses inductor current when n- channel switch transistor is on. when inductor?s peak current r eaches 2a, n-channel switch transistor will be turned off. ? reverse current sense amplifier (izero amp) senses in ductor current when p-channel switch transistor is on. when inductor curr ent falls to zero, p-channel sw itch transistor will be turned off. ? if step-up dc-dc converter has moderate or heavy load, inductor current is controlled by the output of error amplifier (err amp). with light load, step-up dc-dc converter operates in idle-mode to improve the efficiency. in idle-mode, peak current of every pulse is fixed at 200ma, and some pulses are skipped. step-down dc-dc converter figure 9. block diagram for current-mode step-down dc-dc converter ? the structure of step-down dc-dc converter is similar to that of step- up dc-dc converter. soft-start circuit is used to ramp the internal reference up from 0v to 1.25v.
preliminary rev.01 14/16 EP1551 auxiliary dc-dc controllers figure 10. block diagram for voltage-mode auxiliary dc-dc controllers ? the three auxiliary voltage-mode dc-dc controllers are almost same. the only difference is just aux1 has optional internal divider. aux2 and aux3 must use exte rnal divider for feedback. soft-start circuit is used to ramp internal reference up from 0v to 1.25v. ou tput pulse width is modula ted by the output of error amplifier (err amp).
preliminary rev.01 15/16 EP1551 package description qfn-32 5 x 5 mm dimensions a a1 a3 b d e e k l n nd ne min. 0.70 0.00 0.20 4.90 4.90 0.25 0.30 nom. 0.75 0.02 0.25 5.00 5.00 - 0.40 max. 0.80 0.05 0.2 ref. 0.30 5.10 5.10 0.5 bsc. - 0.50 32 8 8 side view terminal
preliminary rev.01 16/16 EP1551 top view: bottom view:

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